Cascode Amplifier Design Calculator

Estimate gain, bias, resistance, swing, and coupling parts. Build stable cascode amplifier stages with fewer design mistakes.

Cascode Amplifier Inputs

Example Data Table

Design case Supply Current Load resistor External load Expected use
Low noise BJT 12 V 2 mA 3 kΩ 10 kΩ Audio preamp stage
High gain MOS 15 V 1.5 mA 5.6 kΩ 47 kΩ Sensor front end
Wideband stage 10 V 5 mA 1.2 kΩ 2 kΩ RF buffer driver

Formula Used

For a BJT stage, gm = IC / VT. The input resistance is rπ = beta / gm. The lower and upper output resistances use ro = VA / IC.

For a MOSFET stage, gm is estimated as 2ID / VOV. The small signal output resistance is estimated as ro = 1 / lambda ID.

The cascode output resistance is approximated as Rout = ro1 + ro2 + gm2 ro1 ro2. The effective load is Rout in parallel with RC and RL.

Voltage gain is estimated as Av = -gm1 × Reffective. Overall gain also includes source attenuation from the signal source resistance and input resistance.

Coupling capacitor values use C = 1 / (2πfR). The bypass capacitor uses a multiplier so its reactance stays lower near the chosen cutoff.

How to Use This Calculator

Select BJT or MOSFET cascode topology. Enter supply voltage, bias current, load resistance, source resistance, and device parameters.

Use BJT fields for transistor beta, Early voltage, and VBE. Use MOSFET fields for overdrive voltage and lambda. Unused fields will not control the chosen model.

Enter the input peak signal to check the expected output swing. Set the target low cutoff frequency to size the input, output, and bypass capacitors.

Press calculate. The result appears above the form. Review gain, bias nodes, output resistance, capacitor values, and clipping warning.

Use CSV for spreadsheet records. Use PDF for a simple printable design report.

Cascode Amplifier Design Guide

What This Tool Calculates

A cascode amplifier uses a lower gain device and an upper common base or common gate device. This arrangement reduces Miller effect. It also raises output resistance. The result is higher gain and better high frequency behavior than a simple common emitter or common source stage.

Bias Planning

The calculator starts with the chosen standing current. For BJT mode, it uses thermal voltage, beta, Early voltage, and VBE. For MOSFET mode, it uses overdrive voltage and channel length modulation. These values set transconductance, input resistance, and output resistance.

Gain Estimation

Small signal gain depends mainly on transconductance and effective output load. The cascode stage can have very high internal output resistance. In practice, collector resistance, drain resistance, probe loading, and the next stage reduce the usable gain. That is why this tool combines the cascode resistance with RC and RL.

Output Swing

High gain is useful only when the signal remains inside the linear region. The output node must have enough voltage above the cascode bias node. It must also stay below the supply rail. The swing check compares expected output peak voltage with available headroom.

Capacitor Selection

Input and output coupling capacitors form high pass networks with the surrounding resistances. The bypass capacitor reduces emitter or source degeneration at signal frequencies. A larger bypass factor makes the bypass action stronger near the selected low cutoff frequency.

Practical Notes

Real circuits need device matching, layout care, and stable bias references. RF layouts need short traces and proper decoupling. Audio and sensor stages need low noise parts. Always verify final designs with simulation and measurement before production use.

FAQs

What is a cascode amplifier?

It is a two device amplifier stage. The lower device provides transconductance. The upper device shields the lower output node. This reduces Miller effect and raises output resistance.

Why does a cascode stage have high gain?

Gain increases because the upper device raises small signal output resistance. The effective load becomes larger. Since gain is roughly transconductance times load resistance, voltage gain can rise strongly.

Can this calculator design both BJT and MOSFET stages?

Yes. Choose the topology field. BJT mode uses beta, VBE, and Early voltage. MOSFET mode uses overdrive voltage and lambda.

What does the clipping warning mean?

It compares estimated output peak voltage with available output swing. If the signal is larger than the estimated limit, the stage may distort or clip.

Why is the calculated gain only an estimate?

Small signal formulas assume ideal biasing and simplified device models. Real gain changes with capacitance, temperature, device spread, layout, and loading.

How should I choose bias current?

Use higher current for wider bandwidth, lower noise in some cases, and stronger drive. Use lower current for less power. Check heat and output swing.

Why are capacitor values included?

Coupling and bypass capacitors affect low frequency response. The calculator estimates values from the chosen cutoff frequency and related resistance.

Should I simulate the circuit after using this tool?

Yes. This calculator gives a strong first design. A SPICE simulation and bench test are still needed for final component values.

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