Enter via and operating conditions
Use finished dimensions where possible. Ask your fabricator for plated-hole tolerance, minimum annular ring, and permitted aspect ratio.
Example data table
| Design case | Hole | Plating | Board | Vias | Current | Rise |
|---|---|---|---|---|---|---|
| Logic supply transition | 0.30 mm | 25 µm | 1.60 mm | 4 | 3.0 A | 10 °C |
| High-current plane link | 0.40 mm | 30 µm | 1.60 mm | 8 | 12.0 A | 10 °C |
| Dense control connection | 0.20 mm | 20 µm | 1.00 mm | 2 | 0.8 A | 15 °C |
These scenarios are starting points. Production values must match your stack-up, plating class, and thermal environment.
Formula used
A = π × t × (D + t)
A is copper area, t is plating thickness, and D is finished hole diameter.
I = k × ΔT0.44 × Amil²0.725
k is 0.024 for the conservative model or 0.048 for the less conservative model.
R = ρL / A, V = IR, P = I²R
Parallel vias are treated as equal resistors sharing current evenly.
The current equation is a legacy curve-fit screening method. It does not replace IPC-2152 analysis, simulation, prototype measurement, or fabricator approval.
How to use this calculator
- Enter total current expected through the layer transition.
- Use finished hole size and actual barrel plating thickness.
- Enter the actual copper path length through the board.
- Select a realistic local ambient temperature and allowable rise.
- Apply a derating percentage for additional design margin.
- Review capacity, voltage drop, heat loss, and DFM checks.
- Increase via count or geometry when warnings appear.
- Confirm limits with the PCB manufacturer before release.
Why via sizing affects board reliability
Vias carry more than signals
Plated through vias connect copper layers. They often carry supply current between planes. A small barrel can become a bottleneck. The copper wall heats when current passes through it. Resistance creates voltage loss and power loss. Those effects grow when current rises. They also grow when plating is thin.
Geometry controls electrical behavior
Finished hole diameter and plating thickness set the barrel cross-section. A larger copper cross-section reduces resistance. Board thickness increases the current path length. That increases resistance. Several matched vias in parallel usually improve the result. They share current and reduce combined resistance. Their placement also matters. Use short, wide connections into planes and pads.
Temperature limits need margin
Current capacity is not a universal fixed number. Airflow, nearby copper, laminate, component heating, and copper balance change real temperatures. A conservative temperature-rise target improves margin. Derating gives another buffer. The calculator applies your selected derating after the current estimate. This is useful during early routing. It cannot replace thermal measurements on a finished assembly.
Manufacturing rules remain essential
A via must be electrically capable and manufacturable. Aspect ratio affects drill and plating performance. Annular ring affects registration tolerance and connection strength. Small features can increase cost or reduce yield. Fabricators use different capability limits. Enter limits from your chosen supplier. Confirm drill size, finished hole size, pad size, and plating requirements together.
Use the result as a design screen
Start with the expected peak or continuous current. Select the hottest local ambient condition. Review capacity utilization and the recommended via count. Then inspect voltage drop. Low-voltage rails can be sensitive to milliohms. Add vias where transitions feed loads, connectors, regulators, and high-current devices. Keep return paths close for fast signals. Verify final layouts with your fabricator and practical testing.
Check the whole current path
Peak current deserves special attention. A load can draw more current during startup, switching, charging, or fault recovery. Size the via array for the worst case, not only the average reading. Consider duty cycle, but do not rely on a brief pulse without checking pulse heating. Plane neck-downs, trace widths, connector pins, and copper pours must also carry the same current. The via array is only one link. Place vias near the load and distribute them across copper. Avoid forcing all current through one narrow spoke. For sensitive analog or digital supplies, measure voltage at the load after assembly. That test exposes resistance that simplified calculations can miss.
Frequently asked questions
1. Is this calculator suitable for production release?
Use it for preliminary engineering. Final release should include manufacturer capability checks, stack-up review, thermal assessment, applicable standards, and prototype validation.
2. Why does the calculator ask for finished hole diameter?
Finished hole diameter represents the plated opening. It better describes the remaining copper barrel geometry than the initial drill-tool size alone.
3. Does more plating always improve current capacity?
More barrel copper usually lowers resistance and raises capacity. Fabrication limits, cost, and hole quality still need consideration.
4. Why use several vias in parallel?
Parallel vias split current and lower equivalent resistance. They also provide redundancy, but routing symmetry helps current share more evenly.
5. What is an acceptable capacity utilization?
Lower is safer. Many designers prefer meaningful margin below full estimated capacity. Your product temperature, duty cycle, and reliability target determine the final limit.
6. What does aspect ratio mean here?
It is board thickness divided by finished hole diameter. Higher ratios can make drilling and uniform plating more difficult.
7. Does the tool model AC skin effect?
No. It uses a DC resistance model. High-frequency designs require impedance, return-path, skin-effect, and transition analysis.
8. Can I use this for thermal vias?
It can screen their electrical resistance. Thermal-via performance also depends on copper planes, pad connection, fill, airflow, and the heat source.
9. Why is voltage drop important on low-voltage rails?
A small milliohm resistance can cause material voltage loss at high current. That loss may reduce load margin or regulator performance.
10. Which thermal model should I select?
Choose the conservative barrel model for typical plated through vias. Use the less conservative option only when supporting conditions are justified.
11. What should I confirm with my fabricator?
Confirm drill sizes, finished holes, plating thickness, aspect ratio, annular ring, stack-up, tolerances, via fill options, and reliability requirements.
Safety note: This calculator is an engineering aid. It does not certify compliance or guarantee electrical, thermal, or manufacturing performance.