Op-Amp Integrator Calculator

Ideal inverting integrator

For an op‑amp with input resistor Rin and feedback capacitor C, the ideal transfer function is:

H(s) = Vout/Vin = -1/(s·Rin·C)

Time domain relationship:

Vout(t) = Vout(0) - (1/(Rin·C)) · ∫ Vin(t) dt

Practical (leaky) integrator

Adding a resistor Rf in parallel with C limits DC gain and reduces drift:

H(s) = -(Rf/Rin) / (1 + s·Rf·C)

The simulator uses the differential form: Vout + Rf·C·dVout/dt = -(Rf/Rin)·Vin.

1. Choose Ideal for pure integration, or Practical to reduce low‑frequency drift.
2. Enter Rin and C. If Practical, also enter Rf.
3. Select a waveform and set amplitude, offset, frequency, and phase.
4. Set duration and samples. For periodic inputs, use a few periods.
5. Add rails to model saturation. Outputs are clipped to your limits.
6. Click Calculate. Use CSV/PDF buttons to export results.

Op-amp integrator overview

An op-amp integrator converts an input voltage into an output proportional to the time integral of that input. In the inverting form, the input current through Rin charges the feedback capacitor C, producing a ramp, triangle, or smoothed waveform depending on the source signal.

Ideal integrator transfer function

For an ideal amplifier and capacitor-only feedback, the magnitude rises at 20 dB/decade as frequency decreases, and the phase approaches −90°. The key scale factor is the integration constant 1/(Rin·C), which sets the output slope for DC or low-frequency inputs.

Practical integrator and DC stabilization

Real circuits cannot tolerate infinite DC gain. A parallel resistor Rf “leaks” the capacitor, limiting low-frequency gain and reducing drift from input bias currents and offsets. The corner frequency is approximately fc ≈ 1/(2π·Rf·C); below this, the circuit behaves more like an inverting amplifier.

Choosing Rin and C

Select Rin and C to match your target slope and bandwidth. For a constant input, the ramp slope is −Vin/(Rin·C). Large Rin reduces loading and noise current, while larger C improves low-frequency integration but increases size and leakage sensitivity.

Frequency response and integration accuracy

Integration is most accurate when the input frequencies are above the stabilizing corner (if using Rf) and within the op-amp’s usable bandwidth. Very high frequencies may be attenuated by limited gain-bandwidth, while very low frequencies can saturate the output due to offsets accumulating over time.

Saturation, offsets, and drift

This calculator supports output rails to model saturation. When the computed output hits ±rail, additional integration is effectively lost until the input drives the output back into range. Even small DC offsets can cause long ramps; using Rf, smaller duration windows, or offset correction helps.

Sampling, duration, and numerical method

The waveform simulation discretizes time into Samples over the selected duration, then integrates step-by-step. More samples reduce numerical error and better capture fast edges (like square waves). Choose duration to include several periods for periodic inputs, and verify clipping when rails are enabled.

Typical applications and design tips

Integrators appear in active filters, PID controllers, waveform generators, and analog computing blocks. For robust designs, pair the integrator with a DC reset path, keep input amplitudes within headroom, and validate Rin, C, and Rf tolerances because small shifts can noticeably change slopes and corners.

1) What does an inverting integrator output for a DC input?

It outputs a linear ramp. The ideal slope is −Vin/(Rin·C), so a positive DC input produces a negative-going ramp until the output reaches the negative rail or other limits.

2) Why add a resistor in parallel with the capacitor?

A parallel Rf limits DC gain, reducing drift from offsets and bias currents. It also prevents the output from ramping indefinitely when the input has small DC components.

3) How do I pick the corner frequency in practical mode?

Use fc ≈ 1/(2π·Rf·C). Choose fc well below the lowest signal frequency you want to integrate, so the circuit behaves like an integrator across your band of interest.

4) Why does a square wave become a triangle-like output?

Integration accumulates area under the input. A constant positive level integrates to a rising ramp, and a constant negative level integrates to a falling ramp, forming a triangle when the input alternates.

5) What causes clipping in the results?

If the computed output exceeds your rail limits, the model clips it to ±rail. Clipping is common when Rin·C is small, duration is long, or the input has offset.

6) How many samples should I use?

Use enough samples to capture the fastest changes in the input. For smooth sines, hundreds may work; for square waves, use more to reduce edge error. If plots look jagged, increase samples.

7) Can this replace full circuit simulation?

It’s a fast design and intuition tool. It does not include op-amp gain-bandwidth limits, slew rate, noise, or component parasitics. For final verification, confirm with a SPICE model and datasheet constraints.