Calculator Inputs
Use the responsive grid below. Large screens show three columns, smaller screens show two, and mobile shows one.
Formula Used
The Elmore delay of an RC ladder estimates the first moment of the impulse response. It is widely used for fast timing approximation in interconnect design.
Final node time constant:
τ = RS × (ΣCnodes + CL) + Σ [Ri × (Σ downstream capacitances from node i to load)]
Node k delay in a ladder:
τk = RS × Ctotal + Σi=1..k [Ri × Cdownstream,i]
Useful derived estimates:
- 50% propagation delay:
tpd ≈ 0.69τ - 10–90 rise time:
tr ≈ 2.2τ - Dominant pole:
fp ≈ 1 / (2π au)
This page assumes a simple distributed RC ladder without inductive effects, shielding interaction, or strong waveform distortion.
How to Use This Calculator
- Select the number of ladder segments and apply the count.
- Enter the driver or source resistance.
- Enter the load capacitance attached at the end node.
- Choose the resistance, capacitance, delay, and frequency units.
- Fill each segment resistance and each node capacitance value.
- Press Calculate Delay to place the result above the form.
- Review the summary cards, contribution table, and node delay table.
- Export the current results with the CSV or PDF buttons.
Example Data Table
| Source Resistance (Ω) | Load Cap (fF) | Segment Resistances (Ω) | Node Caps (fF) | Elmore τ (ps) | 50% Delay (ps) |
|---|---|---|---|---|---|
| 25 | 10 | 120, 80, 60, 40 | 20, 18, 15, 12 | 18.375 | 12.679 |
This example represents a four-segment RC ladder. The total capacitance is 75 fF, and the source plus distributed resistance sets the final delay estimate.
Frequently Asked Questions
1. What does Elmore delay measure?
It estimates the first moment of an RC network response. Designers use it to approximate interconnect timing quickly before detailed simulation or signoff extraction.
2. Why does downstream capacitance matter?
Each upstream resistor must charge all capacitance located beyond it. Larger downstream capacitance increases that resistor’s contribution to total delay.
3. Is this suitable for long high-speed buses?
It is useful for early estimation. Very fast links may need waveform, coupling, inductance, and repeater analysis for better accuracy.
4. Why is source resistance included?
Driver resistance charges the entire downstream capacitance tree. Ignoring it can understate delay, especially when wire resistance is modest.
5. Can I use mixed units?
The page uses one resistance unit and one capacitance unit per run. Internally it converts everything to SI units before calculation.
6. What is the weighted effective resistance?
It is the total Elmore time constant divided by total capacitance. This gives a useful equivalent resistance seen by the distributed network.
7. How is the 50% delay estimated?
A first-order RC approximation often uses 0.69τ for midpoint delay. It is convenient for early timing comparisons and quick sensitivity checks.
8. Does this replace SPICE simulation?
No. It helps screening and architectural decisions. Final verification still benefits from extracted parasitics and full circuit simulation.